Blackwell’s first meaningful production deployments did not achieve steady-state operation until 2H25, roughly 9–12 months behind NVDA’s original timeline.

Amazon’s Trainium 2 achieved roughly 80% of H100 performance at the chip level, but compensating for that gap at the cluster level required significantly more networking and power investment, resulting in a less capable system with higher total costs, immature software, and low reliability.

In memory, the demand arithmetic is staggering: a single Vera Rubin NVL72 rack specifies over 20 TB of HBM, 54 TB of DRAM, and 1.15 PB of NAND, and fleet-level extrapolations imply demand that could consume a substantial fraction of global production capacity.

The causer is the InP supply chain — small-diameter wafers from suppliers like AXTI, low yields, and 18–24 month capacity lead times

If TSEM transitions these specifications into volume production, it will put immense pressure on InP EML leaders, who are not only capacity-constrained but locked into 200G per lane technology that may hit a physics wall at 400G.

the demand arithmetic is staggering: a single Vera Rubin NVL72 rack specifies over 20 TB of HBM, 54 TB of DRAM, and 1.15 PB of NAND, and fleet-level extrapolations imply demand that could consume a substantial fraction of global production capacity.

Transceiver makers who partnered early with TSEM on SiPho 1.6T — most notably Innolight, the world’s largest optical transceiver producer by volume — are positioned as downstream winners with a meaningful time-to-market advantage.

AVGO’s design partnership model, where it provides silicon design expertise, SerDes IP, packaging knowhow, and advanced interconnect technology while the hyperscaler provides architecture specifications and workload requirements, has proven to be the winning template. Google’s TPU has used AVGO as its silicon design partner for multiple generations.

The energy bottleneck is forming but has not yet peaked; when it does, the causer/solver dynamic will likely pit legacy CCGT manufacturers (GEV, Siemens Energy) against lower-tier OEMs, alternative generation technologies, and the infrastructure operators who maintained aggressive procurement pipelines

For networking within the rack, traditional passive copper cables could not reliably deliver the required bandwidth over NVL72’s longer node-to-node distances. NVDA adopted Active Electrical Cables — copper cables with built-in signal re-timing and equalization chips, where Credo (CRDO) was a major AEC supplier — as a compromise between passive copper and optical interconnects.